Cache's function in general is to copy part of the contents from lower memory to enable the fast access of those contents by even higher memory or processor core to sustain pipeline operations.
The addressing of existing cache is all based on the following method, match the tag section in an address with the tag read out from tag memory addressed by the indexed section of an address; read out the cache content which is addressed by the indexed section and offset section in the address. If the tag read out from the tag memory matches with the tag section in an address, then the content read out from the cache is valid, called cache hit. Otherwise, if the tag read out from the tag memory does not match with the tag section in an address, then the content read out from the cache is invalid, called cache miss. In the case of a multi-way set-associative cache, perform the said operation on all the Ways in parallel to detect which Way hits. The read out content corresponding to the hit Ways are valid content. If all of the Ways are ‘miss’, then all of the contents read out are invalid. The cache control logic fills the content from lower storage media into the cache after a cache miss.